integrated circuit systems, inc. general description features AV9107C-19 av9107c-20 block diagram frequency generator for fibre channel systems applications av 9107 -19 20 revc091897p the AV9107C-19 and av9107c-20 are high-speed clock generators designed to support fibre channel system requirements. the AV9107C-19 generates a single copy of the 106.25 mhz from a 17 mhz crystal. the av9107c-20 provides a second copy of the 106.25 mhz clock with output skew less than 100ps. an exact frequency multiplying ratio ensures better than 100 ppm frequency accuracy using a standard at crystal with external load capacitors (typically 33pf5% for an 18pf load crystal). achieving 100 ppm over four years requires the crystal to have a 20 ppm initial accuracy, 30 ppm tempera-ture and 5 ppm/year aging coefficients. ? generates one or two 106.25 mhz clocks from a 17 mhz crystal ? less than 60ps one sigma jitter ? less than 200ps absolute jitter ? output skew less than 100ps on two channel version (-20) ? rise/fall times less than 4ns driving 15pf ? on-chip loop filter components ? 3.0v-5.5v supply range ? 8-pin, 150-mil soic package ? specifically designed to support the high-speed clocking requirements of fibre channel systems ics reserves the right to make changes in the device data identified in this publication without further notice. ics advises its customers to obtain the latest version of all device data to verify that any information being relied upon by the customer is current and accurate.
2 AV9107C-19 av9107c-20 pin descriptions pin configurations 8-pin soic functionality pin number pin name type description 1 avss pwr analog ground. 2 vss prw digital ground. 3 x1 in crystal or clock input to device; nominally 17.0 mhz. requires external load capacitors. 4 x2 in crystal drive output from device. requires external load capacitors. 5 oe in output enable causes all outputs to tristate when at a logic low level; has a pull-up. 6 vdd clk2 pwr out +3.3 or +5.0 volt supply (-19). 106.25 mhz clock output (-20). 7 av d d vdd+avdd pwr pwr analog power. (must equal digital power voltage) (-19). digital and analog power, +3.3 or +5.0 volt supply (-20). 8 clk1 out 106.25 mhz clock output. 8-pin soic oe x1, x2 (mhz) fout (mhz) 1 17.00 106.25 0 x tristate
3 AV9107C-19 av9107c-20 note 1: parameter is guaranteed by design and characterization. not 100% tested in production. electrical characteristics at 5.0v operating v dd = +4.5v to +5.5v; t a =0c to 70c unless otherwise stated absolute maximum ratings avdd, vdd referenced to gnd . . . . . . . . . . . . . . . 7v operating temperature under bias. . . . . . . . . . . . . . . . 0c to +70c storage temperature . . . . . . . . . . . . . . . . . . . . . . . . . . -65c to +150c voltage on i/o pins referenced to gnd. . . . . . . . . . . gnd -0.5v to vdd +0.5v power dissipation . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0.5 watts stresses above those listed under absolute maximum ratings may cause permanent damage to the device. this is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operational sections of the specifications is not implied. exposure to absolute maximum rating conditions for extended periods may affect product reliability. dc characteristics parameter symbol test conditions min typ max units input low voltage v il --0.8v input high voltage v ih 2.0 - - v input low current i il v in =0v (pull-up input) -16.0 -6.0 - a input high current i ih v in =v dd -2.0 - 2.0 a output low voltage 1 v ol i ol =10ma - 0.15 0.40 v output high voltage 1 v oh i oh =-30ma 2.4 3.25 - v output low current 1 i ol v ol =0.8v 22.0 35.0 - ma output high current 1 i oh v oh =2.0v - -50.0 -35.0 ma supply current i dd unloaded - 22.0 45.0 ma pull-up resistor 1 r pu - 380.0 700.0 k ohms ac characteristics rise time 1 t r1 15pf load, 0.8 to 2.0v - 0.8 1.4 ns fall time 1 t f1 15pf load, 2.0 to 0.8v - 0.7 1.2 ns rise time 1 t r2 15pf load, 20% to 80% - 1.5 2.0 ns fall time 1 t f2 15pf load, 80% to 20% - 1.0 1.5 ns duty cycle 1 d t 15pf load @ 1.4v 42.0 49.0 55.0 % jitter, one sigma 1 t j1s 15pf load - 30.0 60.0 ps jitter, absolute 1 t jab 15pf load -200.0 200.0 ps output skew, 1 clock 1 to 2 t sk1 15pf load @ 1.4v (-20 only) -100.0 -20.0 100.0 ps input frequency 1 f i 11.0 17.0 19.0 mhz output frequency 1 f o 2.0 106.25 120.0 mhz power-up time 1 t pu -7.5818.0ms transition time 1 t ft 8 to 66.6 mhz - 6.0 13.0 ms crystal input capacitance 1 c inx x1 (pin 3) x2 (pin 4) -5.0- pf
4 AV9107C-19 av9107c-20 electrical characteristics at 3.3v note 1: parameter is guaranteed by design and characterization. not 100% tested in production. operating v dd = +3.0v to +3.7v; t a =0c to 70c unless otherwise stated dc characteristics parameter symbol test conditions min typ max units input low voltage v il - - 0.20v dd v input high voltage v ih 0.7v dd --v input low current i il v in =0v (pull-up input) -7.0 -2.5 - a input high current i ih v in =v dd -2.0 - 2.0 a output low voltage 1 v ol i ol =6ma - 0.05v dd 0.1v dd v output high voltage 1 v oh i oh =-5ma 0.85v dd 0.92v dd -v output low current 1 i ol v ol =0.2v dd 15.0 22.0 - ma output high current 1 i oh v oh =0.7v dd - -17.0 -10.0 ma supply current i dd unloaded - 14.0 30.0 ma pull-up resistor 1 r pu - 550.0 900.0 k ohms ac characteristics rise time 1 t r1 15pf load, 0.8 to 2.0v - 1.6 3.5 ns fall time 1 t f1 15pf load, 2.0 to 0.8v - 0.9 1.5 ns rise time 1 t r2 15pf load, 20% to 80% - 1.8 2.5 ns fall time 1 t f2 15pf load, 80% to 20% - 1.1 2.5 ns duty cycle 1 d t 15pf load @ 1.4v 30.0 40.0 50.0 % jitter, one sigma 1 t j1s 15pf load - 30.0 80.0 ps jitter, absolute 1 t jab 15pf load -200.0 - 200.0 ps output skew, 1 clock 1 to 2 t sk1 15pf load @ 1.4v (-20 only) -100.0 -25.0 100.0 ps input frequency 1 f i 11.0 17.0 19.0 mhz output frequency 1 f o 2.0 106.25 120.0 mhz power-up time 1 t pu -7.5818.0ms transition time 1 t ft 8 to 66.6 mhz - 6.0 13.0 ms crystal input capacitance 1 c inx x1 (pin 3) x2 (pin 4) -5.0- pf
5 AV9107C-19 av9107c-20 ordering information AV9107C-19cs08 or av9107c-20cs08 example: 8-pin plastic soic package lead count & package width lead count=1, 2 or 3 digits w=.3? soic or .6? dip; none=standard w idth package type s=soic pattern number (2 or 3 digit number for parts with rom code patterns) device t ype (consists of 3 or 4 digit numbers) prefix ics, av=s tandard device xxx xxxx-ppp m x#w ics reserves the right to make changes in the device data identified in this publication without further notice. ics advises its customers to obtain the latest version of all device data to verify that any information being relied upon by the customer is current and accurate.
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